Routing Algorithms in Networks-on-Chip by Maurizio Palesi & Masoud Daneshtalab

Author:Maurizio Palesi & Masoud Daneshtalab
Language: eng
Format: epub
Publisher: Springer New York, New York, NY

8.4 Experimental Results

8.4.1 Simulation Environment

In this section, the proposed fault-tolerant routing mechanism is evaluated under some realistic and synthetic benchmarks. The benchmark set includes some synthetic task graphs along with some existing applications that have been widely used in the literature, namely Multi Media System (MMS) [13] with 43 tasks, and Global System for Mobile Communications (GSM) decoder [14] with 80 tasks.

We evaluate the FaulToleReR algorithm by BookSim, a cycle-accurate interconnection network simulator [15]. We have augmented BookSim by Orion2.0 power library [16] in order to evaluate the power consumption of NoCs under different routing algorithms. The power results are based on a 128-bit NoC implemented in 65 nm technology and the frequency varies for different network configuration. Fault injection is done by randomly disabling some links based on a given fault rate. A Router becomes non-functional when all of the links connected to it become faulty. FaulToleReR, as mentioned before, can tolerate as many faults as the case when the aforementioned conditions in Sect. 8.3 are standing.

The network size for the synthetic benchmarks is 4 × 4, 6 × 6, and 8 × 8. The NoC topology is the conventional 2D mesh and the NoC adopts the wormhole switching with 4-flit packets and16-flit buffers for each virtual channel. Simulation lifetime is 6,000,000 cycles for the realistic benchmarks and 10,000,000 cycles for synthetic benchmarks.

We have selected two routing algorithms for the comparison purpose: planar routing [17] and Highly Resilient Routing Algorithm, or HRA for short, presented in [18]. Planar is a well-known adaptive routing algorithm that uses local information to adaptively route packets. It needs some virtual channels to operate correctly and places some restrictions on the virtual channel allocation in order to guarantee deadlock freedom. HRA is a state-of-the-art distributed fault-tolerant routing algorithm that reconfigures NoC to avoid faulty components. HRA prohibits some links and turns in order to prevent deadlock.

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